Strain-Reduction Induced Rise in Channel Temperature at Ohmic Contacts of GaN HEMTs

Operating temperature distributions in AlGaN/GaN gateless and gated devices are characterized and analyzed using the InfraScope temperature mapping system. For the first time, a substantial rise of channel temperature at the inner ends of ohmic contacts has been observed. Synchrotron radiation based high-resolution X-ray diffraction technique combined with drift -diffusion simulations show that strain reduction at the vicinity of ohmic contacts increases electric fi eld at these locations, resulting in the rise of lattice temperature. The thermal coupling of a high conductive tensile region at the contacts to a low conductive channel region is an origin of the temperature rise observed in both short- and long-channel gateless devices

Low Source/Drain Contact Resistance for AlGaN/GaN HEMTs with High Al Concentration and Si-HP [111] Substrate

An optimized fabrication process of ohmic contacts is proposed to reduce the source/drain access resistance (RC) and enhance DC/RF performance of AlGaN/GaN HEMTs with a high Al concentration. We show that source/drain RC can be considerably lowered by (i) optimally etching into the barrier layer using Ar+ ion beam, and by (ii) forming recessed contact metallization using an optimized Ti/Al/Ni/Au (12 nm/200 nm/40 nm/100 nm) multilayers. We found that a low RC of ∼0.3 Ω.mm can be achieved by etching closer to the 2-Dimensional Electron Gas (2DEG) at an optimum etching depth, 75% of the barrier thickness, followed by a rapid thermal annealing at 850°C. This is due to the very small distance between the alloy and the 2DEG (higher electric field) as shown by 2D drift-diffusion simulations combined with Transmission Line Model (TLM) extractions

A Parametric Technique for Traps Characterization in AlGaN/GaN HEMTs

A new parametric and cost-effective tech- nique is developed to decouple the mechanisms behind current degradation in AlGaN/GaN HEMTs under a nor- mal device operation: self-heating and charge trapping. A unique approach that investigates charge trapping using both source (IS) and drain (ID) transient currents for the first time. Two types of charge trapping mechanisms are identified: (i) bulk charge trapping occurring on a time scale of less than 1 ms, followed by (ii) surface charge trapping with a time constant larger than a millisecond. Through monitoring the difference between IS and ID, a bulk charge trapping time constant is found to be independent of both drain (VDS ) and gate (VGS ) biases. Surface charge trapping is found to have a much greater impact on a slow degrada- tion when compared to bulk trapping and self-heating. At a short timescale ( 1 ms), the dynamic ON resistance degradation is predominantly limited by surface charge trapping

A Parametric Technique for Traps Characterization in AlGaN/GaN HEMTs

A new parametric and cost-effective technique is developed to decouple the mechanisms behind current degradation in AlGaN=GaN HEMTs under a normal device operation: self-heating and charge trapping. Our unique approach investigates charge trapping using both source (IS) and drain (ID) transient currents for the first time. Two types of charge trapping mechanisms are identified: (i) bulk charge trapping occurring on a time scale of less than 1 ms, followed by (ii) surface charge trapping with a time constant larger than a millisecond. Through monitoring the difference between IS and ID, a bulk charge trapping time constant is found to be independent of both drain (VDS) and gate (VGS) biases. Surface charge trapping is found to have a much greater impact on a slow degradation when compared to bulk trapping and self-heating. At a short timescale ( 1 ms), the dynamic ON resistance degradation is predominantly limited by surface charge trapping

A Source and Drain Transient Currents Technique for Trap Characterisation in AlGaN/GaN HEMTs

The source/drain and gate induced charge trapping within an AlGaN/GaN high electron mobility transistor is studied, under normal device operation, by excluding self-heating effects, for the first time. Through direct measurement of current transients of both source and drain terminals, a characterisation technique has been developed to: (i) analyse the transient current degradations from μs to seconds, and (ii) evaluate the drain and gate induced charge trapping mechanisms. Two degradation mechanisms of current are observed: bulk trapping at a short time (1ms). The bulk charge trapping is found to occur during both ON and OFF states of the device when VDS>0V; where its trapping time constant is independent of bias conditions. In addition, the time constant of the slower current degradation is found to be mainly dependent on surface trapping and redistribution, not by the second heat transient

A Source and Drain Transient Currents Technique for Trap Characterisation in AIGaN/GaN HEMTs

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